The present invention relates to charge pump circuits and methods, and more particularly, to charge pumps that provide a greater output voltage or use less stages.
Integrated circuits tend to run at low power supply voltages to reduce power consumption and accommodate process shrinking. However, certain elements within an integrated circuit may require a higher voltage such as electrically erasable programmable read-only memory cells (EEPROMs). When the available power supply cannot provide the required high voltage and the on-chip high voltage generation is in demand, the integrated circuit can include a charge pump circuit.
A charge pump circuit is a power supply circuit that boosts a power supply voltage to a higher voltage at an output. A charge pump circuit may include a plurality of pump stages that step up the supply voltage level. The each stage of the charge pump circuit has a pump capacitor and a transistor associated with it. As the source voltage at the transistor in each subsequent stage of the charge pump increases, the threshold voltage the transistor also increases.
In higher voltage stages of the charge pump, less current flows through the transistor toward the output terminal, degrading the performance of the charge pump, because of the increased threshold voltage in the higher voltage stages. The increased threshold voltage limits the number of stages that can be coupled together, and limits the upper range of the output voltage. It would therefore be desirable to provide charge pump circuits that extend the upper range of the output voltage relative to the input voltage to provide a high output voltage for low supply voltage applications.
Charge pump circuits and methods of the present invention step up an input voltage to provide an output voltage. The charge pump circuits have one or more stages. Each stage may include a capacitor and a transistor. Each stage adds an incremental voltage to an input voltage. The capacitors elevate the voltage at a terminal of the transistors in each stage in response to a clock signal to provide the incremental voltage. The output voltage is the sum of the input voltage and the incremental voltages provided by each stage.
One or more of the stages of the charge pump circuit have a depletion transistor. Depletion transistors may be field-effect transistors that have a negative threshold voltage (at a zero source bias) as a result of an implant in the channel region of the device. The depletion transistors allow more current to flow to the output voltage in higher voltage stages of the charge pump, because the lower threshold voltage of depletion transistors provide improved current conductivity at higher source voltages.
The charge pump stages with depletion transistors can provide a greater incremental voltage increase than stages with native devices. Charge pumps of the present invention can provide a greater output voltage, or an equivalent output voltage using less stages, than prior art charge pumps. Charge pumps of the present invention may be used, for example, in programmable logic devices, application specific integrated circuits, processors, and memory devices.